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Cygwin Linux Linux cross Linux fast Windows
r222637
Daniel Jasper
clang-format: [JS] Support Closure's module statements.

These are like import statements and should not be line-wrapped. Minor
restructuring of the handling of other import statements.
r222636
Elena Demikhovsky
Converted back to Unix format (after my last commit 222632)
r222635
Michael Kuperstein
[X86] Fixes bug in build_vector v4x32 lowering

r222375 made some improvements to build_vector lowering of v4x32 and v4xf32 into an insertps, but it missed a case where:

1. A single extracted element is used twice.
2. The lower of the two non-zero indexes should be preserved, and the higher should be used for the dest mask.

This caused a crash, since the source value for the insertps ends-up uninitialized.

Differential Revision: http://reviews.llvm.org/D6377
r222634
Craig Topper
Add missing override keywords.
r222633
Craig Topper
Tablegen output formatting fixes.
r222632
Elena Demikhovsky
Masked Vector Load and Store Intrinsics.
Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores.
Added SDNodes for masked operations and lowering patterns for X86 code generator.
Examples:
<16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask)
declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask)

Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch.

http://reviews.llvm.org/D6191
r222631
Matt Arsenault
R600: Fix extloads of i1 on R600/Evergreen
r222630
Matt Arsenault
R600: Fix assert on copy of an i1 on pre-SI

i1 is not a legal type on Evergreen, so this combine proceeded
and tried to produce a bitcast between i1 and i8.
r222629
Matt Arsenault
R600/SI: Add additional tests for i1 loads
r222628
Matt Arsenault
R600/SI: Fix broken check lines and modernize prefixes

Use -LABEL and remove -CHECK
r222627
Matt Arsenault
R600/SI: Fix missing -verify-machineinstrs on a test
r222626
Saleem Abdulrasool
CodeGen: tweak struct ABI handling

Cygwin and MinGW fail to conform to the underlying system's structure passing
ABI.  Make the check more precise to ensure that we correctly generate code for
the itanium environment.
r222625
David Majnemer
InstCombine: Propagate exact for (sdiv X, Pow2) -> (udiv X, Pow2)
r222624
David Majnemer
InstCombine: Propagate exact for (sdiv X, Y) -> (udiv X, Y)
r222623
David Majnemer
InstCombine: Propagate exact for (sdiv -X, C) -> (sdiv X, -C)
r222622
Simon Pilgrim
Tidied up target triple OS detection. NFC

Use Triple::isOS*() helper functions where possible.
r222621
Craig Topper
Reduce size of some tables in tablegen register info output.

Primarily done by using SequenceToOffsetTable to reduce the register pressure set tables and then sizing the indices into the tables appropriately. Size a few other table entries based on content as well. Reduces X86RegisterInfo.o by ~9k.
r222620
David Majnemer
InstCombine: Propagate exact in (udiv (lshr X,C1),C2) -> (udiv x,C1<<C2)
r222619
Renato Golin
Try to fix ARM buildbots
r222618
Daniel Sanders
Support matching signext attribute in the parallel_num_threads_codegen test to appease clang-cmake-mips builder.

The Mips target adds the signext attribute to signed 32-bit integers in order
to support the N32/N64 correctly. Integers must be promoted to 64-bit bit on
these ABI's.
r222617
Daniel Sanders
Support matching signext attribute in vla-lambda-capturing test to appease clang-cmake-mips builder.

The Mips target adds the signext attribute to signed 32-bit integers in order
to support the N32/N64 correctly. Integers must be promoted to 64-bit bit on
these ABI's.
r222615
David Majnemer
CodeGen: Make atomic operations play nice with address spaces

We were being a little sloppy with our pointer/address space casts.

This fixes PR21643.
r222614
Chandler Carruth
[x86] Teach the vector shuffle yet another step of canonicalization.

No functionality changed yet, but this will prevent subsequent patches
from having to handle permutations of various interleaved shuffle
patterns.
r222613
David Majnemer
InstCombine: Propagate NSW/NUW for X*(1<<Y) -> X<<Y
r222612
David Majnemer
InstCombine: Propagate NSW for -X * -Y -> X * Y